In apparatus for testing electronic circuits, input test signals are generated and provided to a fixture engaging the circuit under test ("CUT"), and resulting output signals are compared with expected results. The test signals and the resulting outputs can be digital, analog (e.g., audio or vdeo) or a combination of digital and analog (e.g., for a codec or modem).
Such test apparatus typically includes time measuring circuits to measure such things as rise time, pulse width, propagation delay, frequency, duty cycle and ratios of repetitive events with respect to signals at the nodes of the CUT. Typically a single time measuring circuit, including comparators that receive the signal or signals being timed and provide event edges to a timer/counter, is employed and is selectively connected to receive an analog signal or signals to be timed. A timer/counter typically counts clock pulses between start and stop events (i.e., the signal of interest crossing a designated threshodd at which the comparator provides an event edge), and two counters can be used so that one can count clock pulses while the other counts events. When timing digital signals at digital nodes of the CUT, the comparators of the digital detectors provide the event edges that are selectively routed by switching to the time measuring circuit.
In a prior art circuit tester available from Teradyne Inc. under the trade designation M606, a general time measuring circuit was provided in the mainframe, and a pair of timing comparators were located in an adjacent test table and connected to input/output plugs to which the user electrically connected his fixture for the CUT and any local pin electronics, e.g., switching and special instruments. Connecting the two timing comparators to more than two pins required switching by the user in his local pin electronics. Digital detectors were in subsystems for two testing stations that also were separate from the mainframe. The time measuring circuit could be connected through an input switch in the mainframe to either the two comparators dedicated to timing or to two comparators of the digital detectors in one of the two testing station subsystems.